Abstract
In the post-Moore era, novel technologies are developed to support higher speeds, with significant emphasis in the field of advanced packaging. One of the technologies in this domain is 2.5D integration, where one or more chiplets are interconnected in the same substrate, called interposer. This integration technology allows for the chiplets to be placed in the same package, and thus the interconnects are much shorter than if the chiplets are placed in separate packages, resulting in lower interconnect latency. In this paper, signal integrity issues for a typical interposer that connects two dies are investigated. Three different types of interconnects are investigated. The metrics used to compare signal integrity among the three configurations are the reflection coefficient, insertion loss, coupling coefficient, and near- and far-end crosstalk between two differential interconnect pairs.
